High speed integrated circuits require ever higher slew rates, i.e., the rate of change of voltage in order to attain higher overall speed of operation. The slew rates are a function of current and parasitic capacitance. Thus speed can be increased by increasing the current up to the power dissipation limits of the system. Or the speed can be increased by deceasing the parasitic capacitance of the system. This latter option, while the preferred approach, is conventionally perceived as a function of the size of the components and distances between them: the smaller the circuits, the lower the parasitic capacitance.